# Experimenting with LT's SwitcherCAD III (LTSPICE)



## Dacali (Apr 22, 2006)

I had a crazy idea of building my own buck-boost controller from scratch so I decided to start looking around for ideas. I wanted something that could take in a decent range of voltages that would use current regulation. I know I won't hit the crazy efficiencies (> 96%) that many of these new ICs do, but I thought it'd be worth a shot. I'm aiming for about 80% efficiency with the added benefit of a wide range of input voltages (1.8V to 5.5V), multiple output levels, and other features.

I wanted to use a microcontroller to directly drive two logic-level MOSFET. By directly controlling the MOSFET firing, I could get constant current dimming instead of needing to use PWM dimming. There would be a color shift, but I’m hoping efficiency gains will be worth it.

Below is some transient analysis of the circuit I did. I'm using a model of a logic-level MOSFET from On Semiconductor. I still need to put in the correct models for the battery, inductor, and capacitor. I'm using ideal models for everything else right now. I just put a random serial resistance for the battery so all of them are dropping much more than they would in real life.

In other words, the data is completely useless! 

Left sides label were inputs, right side labels were outputs.

From top to bottom: Current, Efficiency, Power, Voltage

Rough model of 2 Nimh in boost mode:






Rough model of 1 Lithium in boost mode:





Rough model of 5.5V source in buck mode:





Who knows if it'll actually work in the end, but it's been a learning experience so far. There's so many more details to work out too!

-Dacali

Anyone know of any SPICE models for various battery chemistries?


----------



## MrAl (Apr 22, 2006)

Hi there,


I could probably help more if you post a circuit somewhere.

For the 18650 Li-ion cells i've found the series resistance is about 0.05 to 0.2 ohms,
and that's the most important aspect (besides voltage of course).

This sounds like a very interesting project so please post your circuit.
If you dont want to post, email me an i'll promise not to disclose details
to anyone else. I wanted to do something like this also, for my personal use only.


Take care,
Al


----------



## Dacali (Apr 22, 2006)

Here's the circuit. It based off of a normal inverting buck-boost converter. It's a hybrid of a normal inverting buck-boost and a negative inverting buck-boost. The N-type MOSFET was placed on the negative side so that the source terminal was always grounded. The source of the P-type is always connected to +Vin. This way, a high-side MOSFET driver isn't needed, and it would at least be somewhat possible to drive it with the microcontroller port. During simulation, I noticed the gate briefly drew 400mA before firing which may be a problem in real life.

The load current flows from R1- to R1+ since it is an inverting driver. I placed a diode in parallel with the P-type MOSFET so I could delay the firing to ensure both MOSFETs were not conducting at the same time.






-Dacali


----------



## MrAl (Apr 23, 2006)

Hello again,

How are you controlling the two mosfets? I see two Vcont sources but
no mention of what they are...pulse sources i guess?

Anyway, if you elminate M1 i think you can control the output current
with source voltages (V1) from maybe 1v to maybe 5v or higher. Diode
D2 is of course going to be a Schottky.

The principle of operation is as follows:

When the source voltage is lower than the LED forward voltage, relatively long
pulse widths drive the gate of the N chan MOSFET. The longer inductor charge
time means higher boost current when the MOSFET is off.
When the source voltage is higher than the LED forward voltage, relatively short
pulse widths drive the gate of the N chan MOSFET. The short charge time
means less boost current (than would be present with a longer charge time
and the same source voltage).
Note the circuit is always boosting yet it drives the LED properly with high or
low source voltages.

Sound good?

Take care,
Al


----------



## Dacali (Apr 23, 2006)

They are configured as pulse sources. They are both driven with (+Vin - 0.2V) (to roughly simulate a microcontroller port) for DT seconds then switched off for (1-D)T seconds. It basically simulates a 100 kHz PWM signal with a duty cycle of D. -Vcont has a slight delay before going low and goes back high right before the end of the period.

The reason for limiting my input to 1.8V to 5.5V was that the input voltage also has to power the microcontroller I wanted to use (Atmel ATtiny25/45/85). If higher voltages were used, I would need to buck the input voltage to the microcontroller. I would also need to add a MOSFET driver to drive the P-channel MOSFET since the source terminal V(M1:S) would still be connected to Vin. V(M1:GS) would need to be > -1 V to ensure that the MOSFET is not conducting.

Your priciple of operation is exactly how it works. The P-channel MOSFET shorts the the diode D2 to gain higher efficiencies. I placed a random model of a Schottky in place of D2 and ran the simulations with and without the P-channel MOSFET. With the MOSFET efficiencies went up an additional 5-7%.

-Dacali

Edit: Grammar error


----------



## NewBie (Apr 23, 2006)

You should model up your gate drive circuit (uC output pin?), it can have a large impact on things.

Also, keep in mind, those on resistance specs are for when you mount it on a 1 sq. in. copper pad...otherwise the die will warm up alot and the on resistance will rise, generating even more heat, until alot of your circuit losses are due to the MOSFETs. Also note the thermal resistance for the part.

Another part, that doesn't need 1 sq. in. of copper to run at "spec" (depending on how hard you plan to push things) that you might consider, depending on space constraints:
http://www.fairchildsemi.com/ds/FD/FDS9934C.pdf


----------



## Bing (Apr 23, 2006)

Hi !

My 1st post here ! :wave:

Have you seen the Linear product LTC3454 which has couple of controls for it's performance that can be easily driven from microcontroller such simple DAC for the current control and etc.

It will lower the component counts and less headache especially on the gate drive and timing problems, so you can more focus on the control and features part. 

LTC3454 - 1A Synchronous Buck-Boost High Current LED Driver










or this

LTC3490 - Single Cell 350mA LED Driver











Again, its just a suggestion.


----------



## NewBie (Apr 23, 2006)

Both those circuits are pretty limited, with high on-resistance parts, the efficiency suffers greatly.

If you look at the LT3454, the internal MOSFET on-resistances are 130 and 170 milliohms. With **** poor internals like that, it isn't too hard to do alot better.


----------



## Dacali (Apr 23, 2006)

If I’m going to prototype the circuit at some point in the future, I need to do much more design and testing. I just wanted to see if it was possible to design a synchronous buck-boost circuit without a high-side MOSFET driver.

NewBie, thank you for your suggestion. I wanted to do a temperature analysis, but I’m not sure SWCADIII can do it. If it can, I’ll have to manually type in the commands. I’ll probably simulate everything on PSPICE once I have some free time on campus. You’re absolutely right about needing to model the output pin on the microcontroller. I still have to find models for the other parts to get a more accurate analysis. I was wondering if you can point me in the right direction in finding a suitable inductor.

I’m hoping the microcontroller can drive the MOSFET correctly. I know goldserve’s FluPIG used an N-channel MOSFET directly driven by his microprocessor (PIC12, I think). He was switching at a much lower frequency though. (480 Hz vs. 100 kHz)

I want to have a prototype of it done sometime during my summer break. I'm more interested in microcontroller programming then power engineering. The majority of the work is in designing the circuit though. The programming is the easy part!

-Dacali


----------



## HarryN (Apr 23, 2006)

It would be really neat if you can do a buck boost that can handle 1 or 2 Li Ions in series and run either a Lux III or Lux V. That is a challenge to find.


----------



## MrAl (Apr 23, 2006)

Hi again Decali,

Did you consider the effects of the gate drive current when calculating eff?
All you would have to do is add the power from the control sources
to the main power calculation.
Before that, the gate drive sources should have some series resistance
added because no real life driver will be without at least some.
This will add to the rise and fall times of the MOSFET as well as diss
some power.

Take care,
Al


----------



## Dacali (Apr 23, 2006)

HarryN, theoretically, you could take the same flashlight and use different battery tubes and chemistries in any combination that would yield between 1.8V and 5.5V. The circuit is still all simulations and theory though.

MrAl, I added the power used both voltage sources (V2 and V3) into the analysis. The graphs were basically useless though since it draws a lot of power in a very short period of time. It just made for a solid wide bar on the graph. I’m not sure what series resistance should be used, so I didn’t put that in yet. From zooming on the power used during one PWM period, it says it draws ~1.8W max (Yikes!) for 6 ns. It’s more of an exponential decay though. With a frequency of 100 kHz, 6 ns is about .06% of the period. Averaged over the period, that’s .06% * 1.8W = ~ 1mW. The losses in the other components will probably have a much greater impact once I get more accurate models in there. On top of circuit losses, the microcontroller will also draw power too whichI haven’t factored in yet.

I’ll definitely do more simulations as I get more SPICE models though!

-Dacali


----------



## Dacali (Apr 23, 2006)

I looked at the datasheet for the ATtiny microprocessor to see the voltage drop on the output pin vs. output input. There was about a .75V drop at 20mA draw. The voltage drop isn't quite linear nor temperature independant so I just estimated the series resistance of about 40 Ohms (.75/.02 = 37.5 Ohms).

Here's the analysis with the 40 Ohms in series with the firing voltage sources. It makes much more sense now with the series resistances. I wish I could integrate across the curve and get an average. Anyone know of a way to export the numerical data out of the program?

In the second screenshot, you can see the power, current, and voltage at the gate of the N-channel MOSFET. It isn't the crazy instant-on/instant-off of the previous simulations.

The upward peaks in the efficiency is due to the gate charge draining back into the voltage source. The current is still higher than the 20mA maximum the I/O port can source, but the short duration may allow it to still work fine. I still need to see how much current the port can sink while the gate charge is draining. 

Note: The efficiency are shown with (green) and without (red) the driving voltage sources.

Overview





Zoomed in





-Dacali


----------



## NewBie (Apr 24, 2006)

Poke around here as well, several useful links:
http://candlepowerforums.com/vb/showthread.php?t=42516&page=2&pp=40


----------



## MrAl (Apr 24, 2006)

Hi again Dac,

I see now you are calculating 'instantaneous' efficiency 
Is is possible to connect a resistor/cap filter to the output of your
power calculations...for example...create a node:
vp=(v*i) (or however you calculate power)
then filter it with a resistor/cap low pass filter, then take the average power
tap from the cap and call it Pavg or whatever.
You would end up with at least two power output 'nodes':
PavgIn, and
PavgOut
You could then graph v=PavgOut/PavgIn
to see the real efficiency.


Take care,
Al


----------



## Dacali (Apr 24, 2006)

NewBie, thanks for the link. That was a long read! I still need to check out some of those links though.

I think it may still be possible without a seperate gate driver. The absolute maximum current from an AVR port is 40 mA (from the datasheet). I would like to try to keep that at a maximum of 20 mA, but that would require something to drive the MOSFET from the way it looks. It would probably need to source up to 100 mA, but for very short bursts. It may or may not burn out the port. Only one way to find out! 

Luckily, with a buck/boost the duty cycle and my range of input voltages the duty cycle should never theoretically go lower than 35% or above 70% (Vin: 1.8V to 5.5V, Ratio: ~0.55 to 2.22, Vout/Vin = -D/(1-D)). Hopefully that rise and fall time on the gate won't be too long in comparision. The resolution in that range isn't great though with only about 90 discrete steps between those values.

MrAl, my knowledge of SPICE is fairly limited. I used it for one semester to simulate small signal amplifers using a single BJT or MOSFET. I'll see what I can do though. The easy thing about the instantaneous triangle wave is the average value is always the halfway in between the peak and minimum value. That goes out the window when factoring in the gate input! If I can get raw data though, I can just run it through an Excel spreadsheet.

-Dacali


----------



## NewBie (Apr 25, 2006)

I'll update the uC thread with more info right now.


----------



## Dacali (Apr 25, 2006)

I switched from the NTHD3102C to a NTHD3100C which is a lower voltage/current/gate charge part. It still should fit my needs just fine though.

If I limit the current to under 20mA from the gate sources, the P-channel is just burning off energy since it just can't switch quick enough. The diode alone actually becomes more efficient than the P-channel MOSFET in this simulation. Unfortunately, the efficiency starts to drop below 85% without even considering losses in the inductor and capacitors. I'll look at that other post to get some ideas for a gate driver now.

MrAl, I still haven't figured out how to get an averaged value for efficiency.

Edit: Would something like this work for a firing circuit? I didn't have my electronics book handy so this was just off the top of my head. It may be completely wrong! A NPN and PNP BJT should work too. I think I need to invert the original signal too.






-Dacali


----------



## MrAl (Apr 25, 2006)

Hi there Dacali,

If i understand you right i dont think that will work too well, because the MOSFETs
required a low impedance drive source AND sink. In other words, to turn the MOSFET
off quickly you also need a device that can sink the charge out of the gate to
discharge that nasty cap. 
What is sometimes used in a pinch (relatively simple) is two small transistors like
2N2222 and it's complement, where the two emitters are tied together and the
two bases are tied together, and the collector of the 2222 is tied to V+ and the
collector of the complement device is tied to ground. This acts as a dual
voltage follower and works ok (although the best is to drive with two mosefts
or a ready made mosfet driver chip with two devices on one chip).
I think you said your base drive was coming from a uC chip right? Maybe you
could simulate that with a 150 ohm resistor to the Vcont outputs (3v peak).
This would give you:
The Vcont feeding the NPN / PNP dual transistor pair (through a 150 ohm resistor), 
who's emitters feed the MOSFET gate.

To average the power you can perhaps set up a built in spice device that
can multiply two quantities and simply multiply I times V and on the output
node connect a resistor and capacitor. The voltage across the capacitor
then becomes the average power reading. Note you'll have to adjust the 
time constant to allow a quick enough reading yet not too many 'bumps' in
the voltage waveform. You'll know it's right when you see a voltage that
ramps up within maybe 20 to maybe 40 switcher cycles and then levels off.
Once it levels off you can read 'average power' as the voltage across
the cap.
The trick i guess is finding a device in SwitcherCad that can multiply two quantities.
The inputs to this device are (1) V and (2) I. The output will be a voltage, which
feeds the resistor in the RC low pass filter. The voltage across the cap is then
plotted and if everything worked ok this waveform will be the average power once
it settles to an almost dc level.
You would set up the 'input power measurement' like that, and then do the same
for the output power measurement. You can then enter the division of these two
in the plot setup (i guess, it's been a while since i used SCIII) and that will give
a third waveform that represents the efficiency. If everything worked ok then
the wave should look as you said...as the average of the sawtooth instantaneous
power (without measuring the gate power pulses). Thus, if the sawtooth goes from
say 0.80 to 0.90 then the division should yield 0.85 as the efficiency.

ADDED:
i just took a look at SCIII and under the help menu there is
Help Topics/Modes of Operation/Efficiency Report.
You should probably take a look at this too.


Take care,
Al


----------



## Bing (Apr 25, 2006)

Design And Application Guide for High Speed MOSFET Gate Drive Circuits (PDF file)

Hope this help.


----------



## Dacali (Apr 25, 2006)

Thanks, I'll look at both of those when I get a chance tonight.

MrAl, you're absolutely right about sourcing and sinking current. I completely forgot about turning the MOSFETs off! Here's the corrected version.

Edit: MrAl, I just realized that its exactly what you just described.  The 250 Ohm series resistance is to model the limited current from the microcontroller port. Fairchild Semiconductor has one (CMOS) that looks like it'll work, FDG6320C. Qc = 0.29/0.4 nC (typ/max).

Edit 2: The circuit is also a digital logic inverter or NOT gate.







-Dacali


----------



## MrAl (Apr 25, 2006)

Hi again Dacali,


Oh that looks much better 

I've got some more interesting info for you too...

The SwitcherCadIII has the 'usual' spice model of an arbitrary voltage source,
which comes in very handy! Might not be able to use it with feedback, but we
dont need that here anyway (side note).

It's quite easy to use as a multiplying device too...
Click on "component" then select "bv" (bv is lower case).
You get a voltage source looking device with some text, and you can
place that towards the output of the circuit if you like, and it takes on
the name "B1".
You can then connect a ground on the bottom of the device.
You then right click on it and get the 'value' and modifiy it to read:
V=(v(OUT)*i(R6))
where R6 is the load resistor and OUT is the voltage node
of the output (across R6). Change OUT and R6 to suite your circuit, but OUT
must be the voltage node of the output (or whatever you are calling it, but must be
the output voltage).
Once done, the output of this new device "B1" (top of it) is the product of
the output voltage times the output current (instantaneous output power).
We only need connect a resistor and cap to top of this to average the power.
This can easily be done by 'drawing' a resistor near the B1 top and connecting
it to B1 top, then connect the other end of the resistor to a capacitor, then
ground the other end of the capacitor.
The value of the resistor can be 10k and the cap can be 0.01uf .
You then add a voltage output "Label Net" by placing one at the junction of
the cap and resistor and selecting
Port Type=output and name it something that starts with a 'v' like Vo2.
You now have a voltage output on the schematic called "Vo2" that you can
specify in the transient analysis. It's probably a good idea at this point to
go to Simulate/Start up Transient and select v(Vo2) as your plot, and make
sure during the plot that the wave ramps up at first and then levels off toward the
end of the time window. If not, change the value of the cap to a higher or lower
value so that you get that leveling off of Vo2.

Next, you can do the same for the input, except you'll probably have to negate
the input voltage for the next new bv source (which will take on the name B2).
For example:
In the right click B2 window get the 'value' and mod to something like:
V=(-v(IN)*i(Vin))
where IN is the input voltage node and Vin is the name of the input source.
You then connect the bottom of B2 to ground (as with B1) and connect another
10k resistor to the top of B2 and another cap to that resistor and make another
output label net node (say Vo3). You then end up with another voltage (Vo3)
that represents the average power of the input.

The only thing remaining to do now is divide Vo2/Vo3, which you can do either
(i think) by entering a forumla for the simulation window, or create another 
arb voltage source (bv) that will take the name B3, then in it's value window type:
V=(v(Vo2)/v(Vo3))
You can then create another net label at the top of B3 named "VpoAvg" and use
that as the plot for the next simulation.
Doing the transient analysis, the output VpoAvg will ramp up to some level under
1.00 and that will represent your efficiency. This should probably come in somewhere
around 0.80 or so, but might be higher for your circuit.
Note, however, that this value is not valid until after the waveform
levels off, so ignore the part where it ramps up.

And now for the final question...
How does this compare to SWIII's simulation calculation of efficiency?
Good question 
With an arbitrary app circuit selected and the above method applied, SWIII came 
up with 77 percent and this method came up with 79 percent efficiency.
Why the difference? I didnt look into this yet 

ADDED LATER:
Ok, the reason for the difference was because the original simulation i
did was with a much larger load (2.5x). With the same identical loads
both methods come very close:
SWIII says 79.4 percent, and
This method says about 79 percent, but another averaging on the output
of the last bv source (B3) would get a closer estimate (probably in the
decimal places like 79.1, 79.2, to 79.9, or whatever).
I dont see this as a problem however, as 79 percent is probably a good
enough estimate for a simulation anyway.



Take care,
Al


----------



## Dacali (Apr 25, 2006)

MrAl, thanks once again! I was able to put in the average efficiency and gate firing circuits. Your efficiencies are a quite bit lower than mine. I wonder what may be causing that.

I'm not quite sure how to put in the model for my Low Qg MOSFETs. The model from Fairchild was a 4 terminal device, but the 4th terminal wasn't the substrate. It was labeled "Vtemp" in the model so I assumed it dealt with temperature variations somehow. To temporarily get around it, I just used the 4-terminal MOSFET symbol with the model and grounded the substrate on the symbol. If you look at my schematic now, it doesn't really make complete sense anymore. It looks like the substrate on the PMOS is now grounded instead of being connect to +V. Any inputs or ideas on this would be great!

Anyways... I wish this program was multithreaded! I let the program run on my laptop for about 10 minutes and just gave up. It processed about 500us in simulation time and it slowed down to less than 1ns per second realtime! On the bright side, the MOSFETs firing looked like it was working correctly. I may let it run for an hour or so to see what it does.

Now I need to decide which inductor, capacitor, and diode I want to use to finish off the schematic. If it's above or around 80% efficient, I may try to build one this summer.

Edit: Forgot to attach my schematic.





Edit 2: After one hour, it's at a little under 519us.

Edit 3: After 1.5 hours, 527.5 us with a 215 MB .raw file.

Edit 4: After 3 hours, 547 us. I'll just leave it running overnight to see what happens to it.

I decided to look up parts at Digikey to see if it would be even possible to get the parts I picked out. The estimated ship date for the NTHD3100C is 10/22/2006! The FDG6320C I used for the gate driver apparently only comes in quantities of 3000. What in the world was I thinking when I started this?!

Edit 5: Ooo... free samples!

-Dacali


----------



## MrAl (Apr 26, 2006)

Hi again Dac,

You'll note that since the gate drive's main power is coming from the
supply or ground you shouldnt have to add that into the power
calculation any more (very low current pulses from the Vcont's now).
Besides, you have to integrate each one separately, then add the
two integration outputs, not each instantaneous value...but this
shouldnt be needed as the power i think is very very low now, and
the sizeable current that does get to the gate will have to draw from 
the main source supply (or through ground).

I have a feeling that now the drive to the two driver mosfets isnt adequate now,
but i could be wrong. You'd have to take a look at the rise and fall times of
the gates of the main mosfets.
The rise and fall of the two main mosfets probably has to be small compared
to the period of the switching wave... I did a quick sim of the circuit 
WITHOUT the second (P) mosfet (1N5817 only) and with a very short period
(1us on, 1us off) i got eff of about 70 percent, while with 10us on 10us off i
got well over 85 percent. I also used a 50uH inductor (ideal) and an IRF 
logic level N mosfet, and pulse source with 10 ohms in series.
I hope to do more tomorrow evening sometime, as i dont think i'll have any time
tomorrow in the day.

We can compare notes if you tell me what models you are using for the
two small mosfet drivers and the two large main mosfets, and the
two pulse sources specifications.

I also tried using a third integration on the output of B3 (as described earlier)
and it doesnt seem to work because the SWIII goes wackie. Without another
integration i increased my caps up to 0.03uf to smooth the 'efficiency' waveform
down a little. I get about 2 percent ripple in the efficiency wave now.

This is getting interesting 


Take care,
Al


----------



## Dacali (Apr 26, 2006)

I'm getting efficiencies of about 88% when boosting from my approximation of 2 NiMH batteries. When bucking from my approximation of 1 Li-ION battery, the simulation showed 93% efficiencies. If I set my P-channel to stay off the entire time so all the current goes through the diode, efficiency drops by about 4-6%.

My ripple is about 0.05%. Everything is still with an ideal capacitor and inductor.

The switching is actually working very well. The screenshot of the last schematic had my PMOS upside down in both my gate driving circuits! Oops! It doesn't really matter since I haven't been able to simulate a full 2 ms yet.

The curve for the gate voltages on the main MOSFETs look like they are increasing and decreasing exponentially (e^(t/RC) and 1-e^(t/RC)). While the total rise/fall time on the gate voltage is approximately 100ns (1%), the rise/fall on the drain currents is much faster. Worse case was about 25ns (0.25%) for the PMOS. Since Qg is much lower on the NMOS, the rise/fall time is less than 10ns (< 0.01%).

I used models from On Semiconductor and Fairchild Semiconductor. I attached the models and schematics I used below. For the rest of you that want to give it a shot, you need Linear Technology's LTSPICE/SwitcherCAD III.

Buck/Boost Regulator - Models and Schematics

Note: When playing with the duty cycle, -Vcont is delayed by 0.5% and is 1% shorter than Vcont. I did this to make sure both MOSFETs were not conducting at the same time. I included one with the firing circuit and one without. The one with the firing circuit is so slow it's almost impossible to do any simulations with it. The differences in efficiency should be fairly minimal, but I'm doing a test of both overnight to be sure. Be sure to keep all files in the same folder or it may not simulate at all!

Edit: Wow! My desktop actually finished the simulation of the one with the firing circuit relatively quickly! For my one test case...

With the LED driver, it came out to be 88.47%. The one without the LED driver was 88.87%. I would just use the one without if you actually want to see results fairly quickly. You may need to simulate a little bit past 2 ms to find the steady state condition.

-Dacali


----------



## NewBie (Apr 26, 2006)

There are alot of things you can do to speed switchercad up.

One item is the granularity setting, and there are a whole bunch of other things. You can also tell it to loose the history file recording thing, but I forget what it is called. That can create alot of activity and huge files, granularity settings will also help.

If you want to look at steady state conditions, there is a technique to "pre-bias" everything, but the details on how to do it for switchercad at the moment recalls a blank.

Also, when it goes quirky, there is a checkmark that uses alternate methods, that may help.

For your simulation, did you add the actual gate drivers?

Get around to adding in real life losses in your inductor and capacitors?

Are the gate drivers, if added, powered from the input power, to account for the losses imposed by them?

Once you get closer to what you want to do, don't forget to add in the odd loading characteristics of the LED during startup conditions.

What current/voltage are you running into the LED for your simulation?


----------



## Dacali (Apr 26, 2006)

NewBie, thanks for the information! My laptop can actually finish a simulation now with the gate driver in place. Can you elaborate on the LED's loading characteristics on startup?

I did a quick test with random real models in place that met the required voltages and currents in the circuit. I had to change the solver method to "Alternate" because I was getting random drops of efficiency in my steady-state with "Normal". 

* Boosting from my rough model of 2 NiMH cells

+ Gate driver model in place powered by input voltage
+ Gate drivers modeled using CMOS model from Fairchild Semiconductor
+ Main MOSFETs modeled using CMOS model from On Semiconductor
+ LED modeled by whatever Lumiled model that shipped with LTSPICE
+ More lifelike models for the capacitors and inductors
+ 0.03 Ohm current sensing resistor in place
+ Maximum current on "I/O Port" < 10 mA

- Missing power from the "I/O Port" and the rest of the microcontroller, but they should be minimal compared to everything else

Efficiency: ~80.5%

Pout: ~2.5W
Vout: ~3.6V
Iout: ~0.7A

Pin: ~3.1W
Vin: ~2.4V
Iin: ~1.3A

As battery voltage falls, I can see the efficiency dropping to at worse 70%. I hope that it would stay at least above 75% though.

-Dacali


----------



## MrAl (Apr 26, 2006)

Hi again,

Wow you guys were up early today 

Well, it looks like everything is progressing better now.
Im wondering now, with most ideal elements (inductor, caps) what is
(NOW) the difference in efficiency with and without the second (P) mosfet??
The reason i ask is because i noticed a fairly high eff using only the Schottky
diodes with no P mosfet in the circuit, and i got fairly good eff (over 85 percent).

I hope to be able to use those models today or later tonight (if i can rem how to
add that stuff to SWIII as i havent used this simulator in ages now). Perhaps
some refresh from one of you would help.
Also, Dacali, you havent told me what your pulse spec is yet...you know,
the initial voltage, rise time, on time, stuff like that usually like this:
"pulse [this that this that etc]"
I'd need both pulse source's information.

Once i get up and running we can compare notes.

Thanks.

ADDED:
I see now why i was getting bad results using a third integration on
the efficiency reading...the third 'bv' voltage source was specified
something like this:
V=v(v1)/v(v2)
and this worked fine as long as there was no third resistor/cap set
to do the time integration. As soon as the res/cap was added (LP filter)
the initial voltage across the cap jumped up into the tera volts!
What happened? This is interesting...
Last night i was tired and didnt realize that during the startup v2
(input voltage) can be zero (ore really really close to zero) and 
so even with a tiny output voltage (v1) V can jump up into the
giga or tera volts. Now this is no problem if there is no storage 
device on the output because this condition only lasts for less than
a nano second or so, but once there is a LP filter on the output
the cap stores part of the energy and it just happens that even
for that short time period it's a lot of energy, so the cap voltage jumps
up into the tera volts.
The fix (or hack as it's sometimes called) is to put a fixed microvolt voltage
source in series with the input voltage so there is always some reasonable
value in the denominator...this works out very simple:

V=v(v1)/v(v2)
changes to:
V=v(v1)/(v(v2)+0.000001)

and suddenly everything works again.
Now i can get nice smooth efficiency readings with resolution in the tenths of 
a percent (not that i expect it to be that accurate in the real world anyway
however  ) but it's good for comparison from circuit to circuit.

With mostly ideal elements and ideal non-energy consuming mosfet drive
im getting 87.5 percent efficiency. This is again using the diode and
no second P mosfet. I'll soon be adding the second mosfet too.



Take care,
Al


----------



## Dacali (Apr 26, 2006)

Not early in the morning, but late in early morning! (2:00 AM or so)

The zip file linked previously has my circuit with the models and pulse sources all in place and ready to go. I can post the values of everything later tonight if you want me to.

To use a model, just have the model file in the same working folder as your circuit file. Add a "SPICE Directive" (under Edit) with ".include [filename]" in the text field. To use the MOSFET model, add a NMOS/PMOS symbol. Ctrl+Right Click the symbol, and change the prefix to "X" (to denote that it is a subcircuit) and the value to the the name of the model. I believe its case sensitive so you may want to double check the name in the model file.

I'm still getting 4-6% decreases without the PMOS up top. In my circuit, you can just disconnect the drain of the circuit to get all the current to flow through the diode.

I only used two "bv" sources to find Pout and Pin. I used a plot trace to find Pout/Pin.

Under the simulation command, you can also uncheck "Start external DC voltages at 0V."

Edit: Hmm... LTSPICE has more functionality then I thought it did. I just had to read the included help file! I'll have to do a temperature analysis too. I also found the "Export" button under the File menu so I can analyze it in Excel, but I guess that's not really needed anymore.

-Dacali


----------



## MrAl (Apr 26, 2006)

Hi again Dac,

Oh ok, well i started by using IRF parts but im seeing about the same as
you are now...about 6 percent eff increase with the extra P MOSFET.
The timing (as im sure you know) is critical too.
The bad news is when i went from ideal inductor to non ideal inductor i lost
about 6 percent eff. This is typical though i think.
I added 0.1 ohm series resistance for the battery and didnt see too much decrease
in eff because im using a low esr input cap of 100uf.
OH yeah, before i forget, im not using MOSFETs for the drivers, but rather the
pnp/npn pairs i talked about earlier in this thread. Im driving the bases of each
pair through a 100 ohm resistor. Eff always comes in above 90 percent.

I get the feeling that this circuit should always be able to do at least 80 percent
and even that is probably too low of an estimate. Of course the drive timing has
to be good though.

Take care,
Al


----------



## Dacali (Apr 26, 2006)

As long as current isn't flowing through both MOSFETs at the same time, efficiency will be fine. We could delay and shorten the PMOS firing even more and let the diode flow even more current without too much more of a loss.

What did you do to get efficiency above 90%? What parts are you using right now? Would the BJTs be more efficient than the MOSFETs? The NMOS I'm using right now has Rds of 77 mOhm at 2.5V, and the PMOS has an Rds of 85 mOhm at -2.5V. I hope to find a better part for both of those that still has a low Vgs(th). Do you think the total gate charge matters as much since we're using a gate driver now?

I've been trying to limit myself to a one dual CMOS chip (for the main MOSFETs) to save space. I have no idea how small the needed inductor, capacitor, and diode can get so all of this may be useless extra work. I have a feeling the inductor is going to be huge in comparison to the other parts.

ATtiny45V = 4mm x 4mm (MLF) (Microcontroller)
NTHD3100C = 3.1mm x 2mm (ChipFET) (Main MOSFETs)
FDG6320C = 2mm x 1.25mm (SC70-C) (Firing MOSFETs, 2 needed)

-Dacali


----------



## MrAl (Apr 27, 2006)

Hi again,

Here's my current setup:

IRF7205
IRF7201
2N4401
2N4403
1N5817
0.1 ohm series R for Batt
40uH, 0.030 ohm inductor
input/output caps each 100uf, 0 ohms esr
P pulse 50 percent 10us on, 20us period, 10ns rise/fall
N pulse 50ns delay, 9.9us on, 20us period, 10ns rise/fall
100 ohm base R for mosfet drivers
5v input voltage, 4.7v output, 10 ohm load

From what im seeing the gate current doesnt matter that much with this circuit.

A low resistance inductor will end up being larger than a high
resistance inductor, but the eff will be better of course.

ADDED:
Almost forgot to mention...
I also added 5 ohm resistors in the collectors of certain transistors:
For the N channel driver, the 5 ohm resistor is in the collector of the NPN,
for the P chan driver, the 5 ohm resistor is in the collector of the PNP.
The reason for this is twofold:
1.) to limit spike current when the driver changes state
2.) to delay mosfet turn on slightly
I would think this would be a good idea when using small mosfets as
drivers too, because that spike current can be even higher.
Also, when using the bipolars, a bootstrap supply (from the output) 
is needed for the pulse source when input voltage is only 3v or less.
Luckily this is just a diode and cap.

The difference between using the bipolars or mosfet drivers is the
bipolars need a bootstrap supply, while the mosfets dont.
The storage time in the transistors can be different too, so perhaps
some extra dead time. From inspection of my pulse sources you can
see im using 50ns on either side of the pulse right now, but 100ns
might be even better.
You'll have to check the small mosfets however to see that they are
turning on and off fast enough because, after all, you're driving them
with low current logic too so the same thing can happen that exists when
trying the drive the larger mosfets directly from logic.

Yesterday i was very busy, but today i should be able to find time to
try mosfet drivers myself and we can compare notes.


Take care,
Al


----------



## Dacali (Apr 27, 2006)

The gate drivers seem to be working well. I recommend the MOSFETs in the zip file if you want to try them though. They have a very low Qg rating.

I changed to the Siliconix Si7540DP for my main MOSFETs since they have lower Rds ratings. Gate charge is higher though so the gate drivers are definately needed now. I think they're mislabeled as International Rectifier.

With the most efficient and probably the physically largest components in LTSPICE, I was able to hit 95% efficiency once. I think it was bucking from a 5V source running about 750mA to the LED.

Delaying and shortening the PMOS firing by 100ns is probably a good idea. That's what I was doing originally. The current spikes I'm getting from the gate driver to the MOSFET is less than 100mA so I'm not worried about them. I think the current from the pulse source to the gate driver is under 20mA last time I checked.

-Dacali


----------



## MrAl (Apr 27, 2006)

Hi again Dac,

Sounds good 

Looks like i'll be trying the mosfet drivers tomorrow...

I'll be checking the rise/fall times of the gates of the main mosfets to make sure
they arent too bad. 95 percent sounds like it's good to go, but i bet the
inductor is way oversized he he. That's life i guess. The inductor i used
for two things:
1.) Regulated switching buck converter for a scanner
2.) Base buck power supply for a no-heat Li-ion charger
with both ended up being about 1.2 inches in diameter and about 0.3 inches thick,
standing on one side. This is bigger than i really wanted of course, but i had to meet
certain peak current requirements for both. No way outta it sometimes...if you
need the low series R or the higher peak current then you need the larger inductor.
I really needed at least 50uH with both projects to keep peak current within
reason.
I've used gaps in the past too, to get a higher peak current from a
smaller device, but it's hard to do with a toroid.


Take care,
Al


----------



## Dacali (Apr 27, 2006)

In the end, everything will be a trade off. While 95% efficiency would be great, I don't think many would buy a converter board the size of a D-sized battery!

I'll probably start deciding what I want out of the regulator before picking the rest of my parts. I think I'll set my maximum input current to whatever it takes to drive a Luxeon III at 3W with 2 NiMH batteries. Maximum output will be 1.5A to correspond to the new K2 when they're ready. I'll just aim for 80% to 85% efficiency.

I want to get all the parts so I can start working on the part I'm actually interested in, the microcontroller programming! What are you planning on using it for?

-Dacali


----------



## MrAl (Apr 28, 2006)

Hi again Dac,

Oh so you're after 1.5 amps? Wow, that's higher than i figured.
What size NiMH cells are you going to use? Just wondering because
with AA's the runtime probably ain't gonna be that long with 1.5 amps out 

I was thinking of making (of course) an LED driver too, but with analog 
feedback for current regulation. Luxeon 1 watt, 350ma output. I think
we could get REALLY high eff at that output level even with a moderate
size inductor.

I hope to try your mosfet driver scheme today...that's my goal for today.

ADDED LATER:
Ok, mosfet drivers seem to work but the analysis slows down way
too much. From 100us per second to 20us per second.


Take care,
Al


----------



## Dacali (Apr 28, 2006)

If I drive a K2 at 1.5A with NiMH batteries, I'll definately be using four AAs. That should be about an hour and a half of good bright runtime! After all the power losses, I think it would pull about 1.5A or slightly less from the batteries to put out 1.5A at around 4V.

The great thing about going with the basic DC-DC circuit is that it can be adapted to whatever you need may be. It can handle basically any voltage above 1.8V as long as your components can handle it. I would need a regulator for my microcontroller and a real MOSFET driver IC to boost the output to the PMOS gate though.

I'm guessing you'll be using a PI controller with a PWM modulator for your control circuit? I'm interested in hearing more about your analog solution!

The analysis does slow down a whole lot. I think that's as close to an actual circuit as I can get. I still need to select the inductor and capacitor I want to use before I can build it though.

-Dacali


----------



## MrAl (Apr 28, 2006)

Hi again Dac,

Oh four AA's, that sounds better  I like brightness just as much as the next
flashaholic but i also like runtime.
Yes, this is like a general purpose dc dc buck boost converter, which can be used
as the guts for many an LED driver.
The parts count is getting a little high for my taste however, im not sure what
im going to do now, but for sure keep this circuit in mind as the eff is nice!
I was also thinking of going with some mosfets that are in 'model' form (SWIII)
so the analysis would speed up a bit. I know it's the subcircuits that slow it
down mostly. The four bipolars i was using dont seem to bother it too much.
Maybe use the built in gp mosfets and spec the few required things like gate
charge. The two mosfets you are using (small ones) do seem to have very 
little gate charge, as even with 250 ohms they drive quite well.


Take care,
Al


----------



## Dacali (Apr 28, 2006)

The microcontroller will handle the runtime part! I just like having the option of going full blast. It'll even be using current dimming so it'll be much more efficient then PWM dimming.

The part count is a little too high for my tastes too. Compared to using an IC, I think it's an additional 3 components which isn't too bad: microcontorller, two dual-channel MOSFET gate drivers. If only my main MOSFETs had a lower gate charge, it could be driven by the microcontroller. Then, the only additional component would be the microcontorller itself. If only I could solder a 4mm x 4mm 20-pin QFN package...

I'll have to try out the "model" MOSFETs with a lowered Qc when I get a chance today to see how much that improves the simulation time. Thanks again.

-Dacali


----------



## MrAl (Apr 28, 2006)

Hello again Dac,

Well, i went to all 'built in model' mosfet drivers and seem to have lost 10 percent
efficiency! I suspect something is wrong with the timing, although i've checked
and double checked it. Geeze, i was getting 90 percent with the bipolars.
Checked current waveforms through each mosfet too and there's 100ns gap,
which is just what i planned for, so im baffled at the moment 

Im using mosfets with really low gate charge for now.


Take care,
Al


----------



## Dacali (Apr 28, 2006)

Hmm.. that's really odd. Have you looked at the waveforms for Ids on both MOSFETs? I haven't had a chance to try out the "model" MOSFETs, but I'll try to get around to it tomorrow. It may just be simpiler to just go with the BJTs.

-Dacali


----------



## MrAl (Apr 29, 2006)

Hi again Dac,

Yes, i looked at both waves and there is 100ns gap between mosfet currents,
which is what i had hoped for when i put 100ns delay in the N mosfet contr signal
and also made it 100ns shorter than the P mosfet contr signal.
It could be that the rise/fall times changed, which will also influence eff a lot,
so i guess i'll have to take a closer look at that next, in both the bipolar circuit
and the one using the mosfet drivers.

I just picked two mosfets (one N and one P) for my drivers off the list that comes
with SWIII, in the 'component' list. I looked for very low gate charge (2 or 3 nC)
and low gate threshold voltage (because this is for a low volt circuit).

I'll give you the two part numbers if you'd like to try 'em.


Take care,
Al


----------



## Dacali (Apr 29, 2006)

Sure, I'll give it a shot. It looks like I'll be bogged down with work and school for a few days though so it may be awhile.

Did you change the resistances values between the sources and the base of the transistor? The transistors I used for the gate drivers had gate charges of about 0.5 nC or so.

-Dacali


----------



## MrAl (Apr 29, 2006)

Hi again Dac,

The mosfets i used for the drivers were:

NTLMS4502N (n chan)
Si4433DY (p chan)

I got up to 85 percent, but cant get above that no matter what i change
(using a 'real' inductor with 0.030 ohms series R).

I checked and double checked everything but in order to find out where that
5 percent (which i think is a lot to lose for this circuit) went is going to take
calculating the power in ceratain elements (like the main mosfets) for the circuit
with bipolar and the circuit with mosfet drivers to see what is eating that extra
5 percent. It's really strange too, as i would have expected maybe another 
percent HIGHER, but nope. Maybe the extra gate charges with the driver mosfets.

Current waves in main Mosfets look about the same as with the bipolars.

I also found that the only way to get 85 percent was to insert resistors in
series with the driver mosfet sources (n chan for lower mosfet driver, p chan
for upper mosfet driver). Doing this also gave the side benefit that both 
drivers could be driven with the same pulse source (because the turn on of
each main mosfet is delayed due to the resistors). The res were 30 ohms each.

Take care,
Al


----------



## MrAl (May 2, 2006)

Hello again,

Tried the mosfets you gave the spice data for, and got the same results.
85 percent is the highest using the mosfet drivers.

Take care,
Al


----------



## NewBie (May 8, 2006)

MrAl said:


> Hi again Dac,
> 
> The mosfets i used for the drivers were:
> 
> ...




Al,

Was that the gate driver stage you used those for or the output stage?


----------



## MrAl (May 9, 2006)

Hi Newbie,

I used those two mosfets for the gate driver for the output stage of both
the large P chan mosfet and the large N chan mosfet (4 mosfets for drivers,
2 larger mosfets for the main transistors).

Hey i just realized that Dacali's drawing in incorrect. Note how the
P mosfet driver's source is an output terminal (drives the main mosfet).
That cant be right.

Take care,
Al


----------



## NewBie (May 14, 2006)

MrAl said:


> Hi Newbie,
> 
> I used those two mosfets for the gate driver for the output stage of both
> the large P chan mosfet and the large N chan mosfet (4 mosfets for drivers,
> ...




You really might try something a bit lighter weight for the gate driver, something like a 2N7002 or such.

Take a look at Fairchild, FDG6320C 
http://www.fairchildsemi.com/ds/FD/FDG6320C.pdf

At these power levels, normally you find gate drivers with 4-15 ohms of resistance. Those MOSFETs you mentioned for the gate driver, have alot of gate charge to sling around, I'll bet this is where alot of the power is going. Plus the extra burned up in driving that charge fast.

You will notice the MOSFETs in the FDG6320C have about 0.22 and 0.29 nC of gate charge, and higher on resistance. This should easily drive your output stage gates around fast enough. The other really nice thing, is they come in a SC70-6 package, that is a tad smaller than a SOT23.


----------



## MrAl (May 14, 2006)

Hi again Newbie,

Oh yes, those devices look very interesting for gate drivers.
Now to find the spice models?

Thanks a lot 

LATER:

Ok, i had them email me a model, but as i was doing that i realized
that the gate charge isnt an issue (with the simulation, that is)
because im not calculating the gate power used for the driver
transistors, only the power used for the main (2) mosfets.
Still it's nice to know about these devices because the real life
circuit would benefit of course.
One other thing though is that the package they come in is going
to be hard to use because it's so small. Any chance you know of
a similar device (even if separate N and P mosfets) that is a bit
bigger? I've done SO23's ok, but the 70's get a bit small for hand
soldering.

LATER LATER:

Oh ok, this is the same device we were talking about earlier in this
thread  As i said though, i eliminated the gate drive power for the
drivers themselves (not the gate power for the main mosfets though)
from the final efficiency calculation. This was easily accomplished
my simply not including the power delivered from the pulse sources to
the total power calculation.



Take care,
Al


----------



## NewBie (May 14, 2006)

Bigger, FDC6320C - SSOT-6

For prototyping purposes, it is easier to deal with, and has a very similar cousin (looks to be the same die).

It is also available in quantity 1, if you want to buy, instead of sample.

1: $0.54 
25: $0.39 
100: $0.33 
250: $0.26 

http://www.mouser.com/index.cfm?&ha...0C&Ntt=*FDC6320C*&Dk=1&Ns=SField&N=0&crc=true

On the 3,000 reel, the other package part gets into the 0.13ea range, in the 400 dollars a reel ballpark.


----------



## Dacali (May 14, 2006)

Sorry for disappearing off the face of the earth for a little bit. I just finished up my finals. I still haven't been able to do any additional SPICE simulations though! Ack! It'll be a few more days before I can get back into the swing of things.

Summer break is finally here so I hope to start prototyping this thing at some point!



Dacali said:


> The screenshot of the last schematic had my PMOS upside down in both my gate driving circuits! Oops!



Yup. The PMOS gate driver was upside down in the image of my schematic! I actually fixed it before I posted my schematic file awhile back. I mentioned it in a previous post, but I should have probably done an edit to fix it. Sorry for the confusion!

On the gate drivers, the FDC6320C allowed for a quick turn on and turn off. While power to the gate driver was minimal, it had a great effect on the efficiency since it was able to drive the main MOSFETs fully on or off.

Would it be possible to use a depletion mode NMOS instead of the PMOS to gain addition efficiency? I'm a bit rusty on my MOSFETs, and I don't quite remember how depletion mode MOSFETs operate. I'll have to look it up.

MrAl, what input voltage and duty cycle are you using in your simulations?

-Dacali


----------



## MrAl (May 15, 2006)

Hi again Dac,

I was assuming everything was set up right from the start, but maybe we need
to review a few things.
Now that i look closely, something appears wrong with the large P mosfet connection.
We want it to 'short' out the diode when the diode is forward biased, which puts
a more positive voltage at the drain than at the source. This isnt correct.
It 'would' be correct if this was also an N mosfet, but it isnt. Problem with
using an N mosfet here is that we need a gate voltage 2v higher than the
Batt+ supply...so what to do?

Let me take another good look at this circuit and reply again or add to this post.


Take care for now,
Al


----------



## Dacali (May 15, 2006)

Maybe a high-side gate driver would be required for the circuit. 

I assumed with the diode conducting, the voltage across Vds would be approximately 0.3V or 0.4V. As long as Vds <= Vgs - Vt, it should still operate in saturation mode even though current is flowing from the drain to source.

I never considered the effects of having the current flowing this direction though. I incorrectly assumed that a MOSFET behaved purely as a voltage-controller switch. Thanks for the heads up. I'll have to look into the main PMOS more when I get a chance.

Maybe it would work with a depletion mode NMOS, but correct me if I'm wrong here. With a depletion mode NMOS, the transistor is normally on. A negative Vgs must be applied to turn it off. This should be what we're using the PMOS for right now. I would need to go part hunting again though.

-Dacali


----------



## NewBie (May 16, 2006)

Have you looked at any parts like this?

http://focus.ti.com/docs/prod/folde...t/ucc27223.html
http://www-s.ti.com/sc/ds/ucc27223.pdf

I remember finding a small gate driver in a little tiny package, but I can't seem to remember who made it.

You might want to take a gander at:
http://www-s.ti.com/sc/psheets/slua341/slua341.pdf

This is a swell one too:
http://www.fairchildsemi.com/an/AN/AN-9010.pdf

While you are at it:
http://www.fairchildsemi.com/an/AN/AN-7502.pdf

Brush up some more:
http://www.fairchildsemi.com/an/AN/AN-7500.pdf

Trying to squeek out as much as you can:
http://www.fairchildsemi.com/an/AN/AN-7017.pdf


----------



## MrAl (May 16, 2006)

Hi again,

Newbie:
Thanks for the links...very interesting looking. I'll have to look all that stuff over.

Dac:
Well, assuming there is some gate delay built into our pulse generators the
diode will conduct first, meaning the PMos will be incorrectly biased for 'usual'
operation where the drain is more negative than the source. Using a NMos would
correct this, but we'd need a gate source higher than Batt+ as mentioned
earlier, but this might not be too hard to get if we assume the output will be
higher than the Batt+ anyway...bootstrapping comes to mind. Turning off the
NMos is no problem because with the source tied to Batt+ it's easy to find a
zero or negative source (Batt- for example) to turn it off...i dont see a problem
with turning it off.
In the light of this new issue however, i suggest we both take a fresh look at
the circuit. So far i dont see how the PMos turns on correctly. I'll go back to 
my older circuit with the higher eff and see how the PMos is behaving.

LATER:
Ok, the PMos 'model' seems to behave ok with voltages as high as 0.8v
in reverse of the 'usual' connection, but im wondering if the actual
real-life device behaves as well...perhaps if you have a PMos on hand
to test...bias it's drain 0.7 volts more positive than it's source and
see if it turns on *AND* has the same low resistance as seen when
it's conducting 'normally'. See also that it turns off normally too.
The model behaves ok like this.




Take care,
Al


----------



## NewBie (Jun 2, 2006)

A useful basic app note for nuts and bolts for driving a MOSFET:

http://www.zetex.com/3.0/appnotes/design/dn80.pdf


----------



## MrAl (Jun 2, 2006)

Hi Newbie,


I had been using the dual bipolars in my simulations prior to trying the mosfet
drivers, and had good results with that configuration. The problem we face
with this particular design however is that the upper supply voltage might
only be 3 volts or even a little less. Im not sure if he can drive the transistor
pair with a higher voltage or bootstrap the upper's collector, so i guess we will
have to wait for him to reply.


Take care,
Al


----------



## Dacali (Oct 15, 2006)

Sorry for the long absence! Work and school comes first.  If you're still interested...

I just ordered the MOSFET samples so I should get them in a week or two. I'll bias the MOSFET with Vds = 0.7V to see if it turns on and conducts with a low Rds.

-Dacali


----------



## MrAl (Oct 16, 2006)

Hi again,

Oh ok great. Should be interesting to see something running soon.


----------



## Dacali (Oct 16, 2006)

MrAl,

This is slightly off-topic, but could you give an example of bootstrapping in circuit? I've never analyzed a circuit like that before.

-Dacali


----------



## MrAl (Oct 16, 2006)

Hi again,

Sure, but when it comes to boost converters it's nothing more than maybe a diode
that connects the output voltage back to the drive source so that once
the output actually starts to boost (go to a slightly higher voltage) this voltage
then helps to drive the input to make it work better overall.

An example would be driving a MOSFET for a boost converter when you dont have 
much drive voltage from your pulse source. Let's say your pulse source gets it's 
supply from 1.5 volts, and it drives the base of an NPN transistor with emitter
to ground and collector driving the MOSFET (with a pullup resistor to 1.5v also), so 
that when the transistor turns off the MOSFET gets a positive gate drive. But lets
also assume that the mosfet doesnt turn on fully because the 1.5v source isnt
high enough (this is a situation that is usually encountered).
The mosfet does turn on somewhat however, and this allows our boost circuit
to start to function, although in a reduced capacity. It still boosts the voltage
somewhat, but wont provide the full output current at the voltage level we need
(say a 1 watt Luxeon or something).
What we can do is connect a diode in series with a resistor to the output (slightly
boosted) voltage, and the other end of this series combo to the gate of the MOSFET.
What happens now is when the voltage gets boosted slightly, the MOSFET gets
a higher voltage on it's gate which allows it to turn on with a lower Rds. This in
turn allows a higher output current which in turn means the voltage gets boosted
even more then before. This in turn provides again more voltage to the mosfet,
which again allows it to conduct better, which again allows more output current
and more output voltage, etc., etc.
Eventually we reach a point where the output voltage is boosted to it's required
level for the load to function normally and the usual feedback takes over to limit
the output. At this time the output might be as high as 5v (or more) and now
the MOSFET has a nice drive voltage of 5v instead of 1.5v .

This is fairly simple, but there are two issues to keep in mind:
1. The bootstrapped output has to feed back to the drive circuit in a way
that will allow the drive circuits drive to increase (as in example above).
2. The load can not be such that it will dog down the output during the stage
where the drive circuit just begins to get a higher voltage from the output.
This second issue is normally satisfied when driving LEDs, because luckily,
LEDs dont start to conduct heavily untill *after* the voltage rises significantly.
This means plenty of room for the bootstrapping to function correctly.

If needed i'll draw a quick diagram up and post it to the EE course site donated
by Pablo.

http://mral.peu.net/index.php?page=Bootstrapping


----------



## Dacali (Oct 16, 2006)

MrAl,

Thanks for the brief electronics lesson. I'll be sure to keep that in my bag of tricks although it doesn't seem to be applicable in this circuit.

Edit: I haven't received the MOSFETs yet, but I just realized that I don't know how to test the MOSFET. I've never handled SMT MOSFETs or any other SMT part before. Any suggestions is appreciated.

http://www.onsemi.com/pub/Collateral/NTHD3100C-D.PDF

-Dacali


----------



## MrAl (Oct 17, 2006)

Hi again,

To test the MOSFETs i guess you could apply a voltage to the gate and measure
the source-to-drain resistance with an ohmmeter.

For the N channel, connect source to ground and apply the appropriate dc voltage
to the gate (positive, bettween 2.5 and 4.5 volts) and positive meter lead on
drain negative lead on source, then compare reading with specs.

For the P channel, connect source to say +10v. With positive meter lead on source
and negative lead on drain, apply a voltage that is 2.5 to 4.5 volts less than the
source voltage. Compare readings with specs.

SMT parts are small  You should ground yourself to something before touching
the parts with your hands. Touching the computer case bare metal seems to work
ok.

When soldering you should apply the heat and solder quickly.
Some people like to tack one lead down first to hold the tiny package in place,
then solder the other leads, then go back to the first and solder that one fully.

If you can test the mosfet once its soldered down that would be good too.


----------



## Dacali (Oct 17, 2006)

It looks like I'll be getting them in on Thursday. If I can somehow solder leads onto it, I'll test them out on Friday.

Since I'm testing to see what happens when Vds is positive (reverse biased) for the P channel MOSFET, I'll probably use two DC power supplies and apply a Vgs=-3V and slowly increase Vds from 0V to 0.7V for the P channel. I'll take a current reading and calculate the resistance from there.

I'll check out the Rds for both the N and P channel while I'm at it. If I have additional time, I'll use LabView get some real life data and sweep the performance curves.

-Dacali


----------



## PEU (Mar 1, 2007)

I just wanted to post a BIG THANKS to the participants in this thread, its very educative and it helped me a lot.


Pablo


----------

